10G XAUI/10GBase-KX4 Ethernet VIP

10G XAUI/10GBase-KX4 Ethernet VIP

The 10G XAUI/10GBase-KX4 Ethernet Verification IP is compliant with IEEE 802.3 specifications and verifies MAC-to-PHY layer interfaces of designs with a 10G Ethernet interface 10G XAUI/10GBase-KX4. It can work with SystemVerilog,Vera, SystemC, E and Verilog HDL environment. 10G XAUI/10GBase-KX4 verification IP is developed by experts in Ethernet, who have developed ethernet products in companies like Intel, Cortina-Systems, Emulex, Cisco. We know what it takes to verify a ethenet product.

10G XAUI/10GBase-KX4 Ethernet VIP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Features

• Follows 10G XAUI specification as defined in IEEE 802.3
• Follows 10Gbase-KX4 specification as defined in IEEE 802.3
• Supports backplane auto-negotation for 10GBASE-KX4
• Supports all types of 10G XAUI/10GBase-KX4 TX and RX errors insertion/detection.
• Oversize, undersize, inrange, out of range Packet size errors
• Missing SPD/EPD/SFD framing errors
• SPD/SFD on wrong lane
• CRC Error
• Lane skew insertion
• Disparity error injection
• Invalid /D/ and /K/ character injection
• Variable preamble and IPG insertion
• Comes with 10G XAUI Tx BFM, 10G XAUI/10GBase-KX4 Rx BFM, and 10G XAUI/10GBase-KX4 Monitor
• Monitor supports detection of all protocol violations.
• Supports Pause frame generation and detection.
• Built in coverage analysis.

Benefits

• Faster testbench development and more complete verification of 10G XAUI/10GBase-KX4 designs.
• Easy to use command interface simplifies testbench control and configuration of 10G XAUI/10GBase-KX4 TX and RX.
• Simplifies results analysis.
• Runs in every major simulation environment.

10G XAUI Verification Env

SmartDV's 10G XAUI Verification env contains following.

• Complete source code of 10G XAUI Monitor, TX and RX BFM.
• Complete regression suite (UNH) containing all the 10G XAUI testcases.
• Examples's showing how to connect various components, and usage of TXRX BFM and Monitor.
• Detailed documentation of all class, task and function's used in verification env.
• Documentation also contains User's Guide and Release notes.

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