V-By-One HS is the serial communication protocol developed by Thine Electronics, Inc to support the higher frame rates and the higher resolutions required by advancing FPD technologies. V-By-One HS VIP can be used to verify transmitter or Receiver device following the V-By-One HS basic protocol as defined in V-By-One HS.

V-By-One HS VIP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env



  • Follows V-By-One HS specification as defined in V-By-One HS version 1.2/1.3/1.4
  • Support transmitter and Receiver Mode
  • Supports upto 32 serial lanes
  • Supports all byte lengths, color depths, and resolutions
  • Supports lane skew insertion in transmitter mode
  • Supports disparity and invalid code insertion in 8b/10b.
  • Scrambler can be enabled or disabled.
  • Supports insertion of scrambler errors.
  • Supports scrambler as in V-By-One HS specification
  • Support on the fly generation of data.
  • Detects and reports the following errors
    • Invalid control character
    • Invalid data character
    • Invalid 10bit code
    • Sync errors
    • Scrambler errors
    • Disparity errors
    • Alignment errors
  • VIP can be connected to DUT at following interfaces - Serial interface : txn, txp
  • Test suite to test each and every feature of VByOne specification.
  • Status counters for various events on bus.
  • Supports constraints Randomization.
  • Built in functional coverage analysis.
  • Callbacks in Transmitter and Receiver for various events.


  • Faster testbench development and more complete verification of V-By-One HS designs.
  • Easy to use command interface simplifies testbench control and configuration of receiver and transmitter.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

V-By-One HS Verification Env

SmartDV's V-By-One HS Verification env contains following.

  • Complete regression suite containing all the V-By-One HS testcases.
  • Examples's showing how to connect various components, and usage of Transmitter, Receiver and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation contains User's Guide and Release notes.

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