Safe-By-Wire Plus VIP

Safe-By-Wire Plus (SBWP) VIP is an advanced solution in the market for the verification of Safe-By-Wire Plus (SBWP) two-wire birectional bus. It is adherent with Safe-By-Wire Plus (SBWP) 2.0 specification. The Safe-By-Wire Plus (SBWP) VIP monitor acts as powerful protocol-checker, fully compliant with Safe-By-Wire Plus (SBWP) 2.0 specification.

Safe-By-Wire Plus (SBWP) 2.0 VIP includes an extensive test suite covering most of the possible scenarios.

Safe-By-Wire Plus VIP is supported natively in VMM, RVM, AVM, OVM, UVM, Verilog, SystemC and non-standard verification env

 

Features

  • Adherent to Safe-By-Wire Plus 2.0 Specification.
  • Supports generation of frames with error and noise injection.
  • Tracking of the transmit and receive counters.
  • Protocol Checker fully compliant with Safe-By-Wire Plus 2.0 specification.
  • Detection of bit errors by master and by slave
  • Functional Coverage Measure.
  • Complete testsuite
  • Bus-accurate timing
  • Monitor, Detects and notifies the testbench of all protocol errors.

    • Benefits

  • Faster testbench development and more complete verification of Safe-By-Wire Plus designs.
  • Easy to use command interface simplifies testbench control and configuration of slave and master.
  • Simplifies results analysis.
  • Runs in every major simulation environment.
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    CAN Verification Env

    SmartDV's Safe-By-Wire Plus Verification env contains following.

    • Complete SystemVerilog source code of Safe-By-Wire Plus Monitor, Slave, Master.
    • Complete regression suite containing all the Safe-By-Wire Plus testcases.
    • Examples's showing how to connect various components, and usage of Master, Slave and Monitor.
    • Detailed documentation of all class, task and function's used in verification env.
    • Documentation also contains User's Guide and Release notes.




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