eMMC VIP

eMMC VIP is an advanced solution in the market for the verification of eMMC implementations. It is adherent with eMMC standard JESD84-C44. It can generate all command types. The eMMC VIP monitor acts as powerful protocol-checker, fully compliant with eMMC JESD84-C44 specification.

eMMC JESD84-C44 includes extensive test suite covering most of the possible scenarios and eMMC conformance norms. eMMC JESD84-C44 VIP can perform all protocol tests as testbench and moreover it allows an easy generation of a very high number of patterns and a set of specified patterns to stress the DUT.

eMMC VIP is supported natively in VMM, RVM, AVM, OVM, UVM, Verilog, SystemC and non-standard verification env

 

Features

  • Compliant with eMMC JESD84-C44 specification
  • Single byte, single block, multiple block (finite and infinite) transfers
  • Stream transfer operations
  • Asynchronous and synchronous abort mechanism
  • Suspend/Resume card operation
  • Lock-unlock and erase operation card features
  • Clock disable and interrupt wake up card features
  • Tracking of the transmit and receive counters.
  • Protocol Checker fully compliant with eMMC JESD84-C44 Specification.
  • Functional Coverage Measure.
  • Complete testsuite
  • Configurable as agent (frame generator) or monitor.
  • Compares read data with expected results
  • Bus-accurate timing
  • Monitor, Detects and notifies the testbench of all protocol errors.
  • Benefits

  • Faster testbench development and more complete verification of eMMC designs.
  • Easy to use command interface simplifies testbench control and configuration of slave and master.
  • Simplifies results analysis.
  • Runs in every major simulation environment.
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    eMMC Verification Env

    SmartDV's eMMC Verification env contains following.

    • Complete SystemVerilog, Verilog, SystemC, Vera, E source code of eMMC Monitor, Slave, Host.
    • Complete regression suite containing all the eMMC testcases.
    • Examples's showing how to connect various components, and usage of Host, Slave and Monitor.
    • Detailed documentation of all class, task and function's used in verification env.
    • Documentation also contains User's Guide and Release notes.




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