Display port VIP

Display port VIP

Display port is the serial communication protocol developed by Video Electronics Standards Association to support the video,audio and other data between a source device and sink device. Display port VIP can be used to verify transmitter or Receiver device following the Display port basic protocol as defined in Display port.

Display port VIP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Features

• Full Display port source device and sink device functionality.
• Supports multi lanes upto 4 lanes.
• Supports control symbols for framing(Both Default & Enhanced framing mode).
• Supports serial & parallel bit ordering.
• Supports Interlaced & non-interlaced video stream.
• Supports Nibble interleaving(ECC).
• Supports main link, Aux link and Hot plug functionality.
• Supports ANSI8B10B encoding / decoding.
• Supports Serialization and de-serialization.
• Supports packing of all the video formats supported by the display port
• Supports packing of all secondary(audio) formats supported by the display port
• Supports HPD based link training.
• Supports interlane skew insertion in source mode
• Supports deskew in sink device mode
• Supports scrambler as in Display port specification
• Scrambler can enabled or disabled dynamically.
• Support on the fly generation of data.
• Detects and reports the following errors.
• Invalid control character
• Invalid data character
• Invalid 10bit code
• Sync errors
• Scrambler errors
• Single and multi bit ECC errors
• Invalid packing injection and detection
• Monitors, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations.
• Status counters for various events on bus.
• Callbacks in node transmitter, receiver and monitor for user processing of data.
• Re-transmission of corrupted messages.
• Display port Verification IP comes with complete testsuite to test every feature of Display port version 1.2 specification.
• Functional coverage for complete Display port features.

Benefits

• Faster testbench development and more complete verification of Display port designs.
• Easy to use command interface simplifies testbench control and configuration of receiver and transmitter.
• Simplifies results analysis.
• Runs in every major simulation environment.

Display port Verification Env

SmartDV's Display port Verification env contains following.

• Complete source code of Transmitter, Receiver and monitor.
• Complete regression suite containing all the Display port testcases.
• Examples's showing how to connect various components, and usage of Transmitter, Receiver and Monitor.
• Detailed documentation of all class, task and function's used in verification env.
• Documentation contains User's Guide and Release notes.

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