I hope you, your family and your colleagues are safe and healthy as we begin to enter the post-pandemic phase.
As a valued customer, we appreciate the trust you place in us. You can be assured that even as we dealt with extreme uncertainty caused by the pandemic, our more than 250 engineers remained focused on your success and will continue to do so. A top priority for all of us is to provide you with excellent customer support and service customized to meet your every need.
Our expanding portfolio and full complement of high-quality, cost-effective Design and Verification IP solutions now number more than 700 products. The newest editions to our portfolio are Design and Verification IP supporting ARINC protocols and standards that are widely used in avionics, cabin systems, protocols and interfaces used by air transport and business aircraft.
In this issue of Get Smart, we focus on SimXL, a portfolio of Synthesizable Transactors and an example of the richness of our product portfolio. It leverages the expertise of our ASIC and SoC design verification engineers, each of whom has a rich skillset of experience using HVLs and other verification technologies.
In closing, we’re committed to making SmartDV your “go-to” vendor for all your Design and Verification IP needs.
Please enjoy the newsletter and send us your feedback. Comments, suggestions and questions are welcome.
Deepak Kumar Tala
Hardware emulation—or FPGA prototyping—is an essential component in the verification process required in complex chip design programs. Global competition and time-to-market demands necessitate the need for minimizing project schedules and eliminating as much risk as possible. Ideally, the transition from software-based simulation and verification should be as seamless as possible and fast. SmartDV’s SimXL product line makes this possible.
Our SimXL portfolio of Synthesizable Transactors accelerate system-level, SoC testing on hardware emulators or FPGA prototyping platforms. A configurable, reusable plug-and-play verification solution for interfaces based on industry-standard hardware verification languages, SimXL runs on Cadence Palladium, Veloce Strato from Siemens EDA, Synopsys’ ZeBu and any custom FPGA prototyping system. SmartDV’s SimXL VIP products are available for a wide spectrum of protocols and applications including automotive, serial bus, memory, MIPI, networking, SoC interconnect fabrics, storage, video protocols, and aerospace and defense electronics.
Developed with the same functionality and performance as our Verification IP for simulation, SimXL offers fast execution speed with advanced commands, configurations and a status reporting interface for ease of use and debug. An interface based on UVM, OVM, SystemVerilog and SystemC controls SimXL.
SimXL utilizes the same API, sequence lib, test cases, behaviors and time delays that are used with SmartDV’s simulation VIPs. This full compatibility enables designs to move quickly and seamlessly from simulation to emulation without the need to translate or re-target the simulation environment for emulation. A synthesizable RTL interface with a testbench written in C/C++, SystemC or SystemVerilog links to the DUT mapped onto the emulator or FPGA prototyping tool to mimic a specific protocol. Virtual device models, application specific logs, consistency checkers, virtual speed adapters to real hardware and networks, data analysis and export functions provide the protocol-specific tools to evaluate test results.
Each SimXL synthesizable transactor comes with advanced commands, configurations and status reporting interface for ease of use and streamlined debugging. Supplied documentation includes a User’s Guide with examples of how to connect components and utilize synthesizable transactors and release notes.
View our latest SmartDV product directory to see what’s new in our IP product line.
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